As is known, there is a wide range of applications in which, in an electronic integrated circuit, the need may arise to use voltages of a value higher than the ones commonly used in the same circuit. For example, this need may arise from specific requirements of energy saving, area occupation, increase in speed, or the like.
The use of high voltage values may, however, entail risks of damage or even breakdown of the circuit elements, in particular transistors, used in the integrated circuit, which are generally designed for sustaining voltage values not higher than a certain threshold (typically lower than the high voltage values required).
From this risk of damage or breakdown, it may be desirable to use appropriate protection stages, which are designed in such a way as to protect the most critical circuit elements from overvoltages generated by the presence in the electronic integrated circuit of the aforesaid high voltage values. For example, in the case of metal oxide semiconductor (MOS) transistors, these protection stages are designed to reduce or prevent voltages on the oxides of the transistors, i.e., the voltages across the conduction terminals and/or control terminals of the transistors, from exceeding a maximum sustainable threshold. In the case of low voltage transistors, this threshold generally coincides with a logic supply voltage Vdd used in the electronic integrated circuit.
By way of example, the case may be applicable to storage devices, for example, of a flash type provided with 90-nm CMOS technology, present in an internal supply voltage (the so-called “logic supply voltage Vdd”, with values, for example, between 1 V and 1.35 V). Moreover, to modify (for programming or erasure) and read the contents of the memory cells it may be desirable to use higher operating voltages, with values, for example, between 1.65 V and 10 V, which are generated by appropriate charge-pump circuits.
As is moreover known, in level-shifter circuits, which have a wide range of applications in electronics, for example, to interface two integrated circuits operating at different voltage levels, it may be desirable to protect parts of the circuit from overvoltages.
FIG. 1a is a schematic illustration of an exemplary use of a protection stage 1 for protecting a transfer transistor 2 from overvoltages, which is controlled to selectively transfer, from an input terminal In (acting as first transfer terminal) to an output terminal Out (acting as second transfer terminal) a high voltage Vi(t), higher than a maximum voltage sustainable by the transfer transistor itself (which is, for example, of the low voltage type).
In detail, the transfer transistor 2, for example, of a PMOS type, is coupled between the input terminal In, present on which is the high voltage Vi(t), and an internal node 3. The transfer transistor 2 has its control terminal (or gate terminal) receiving a control signal Pg. The high voltage Vi(t) has a value higher than a maximum voltage sustainable by the transfer transistor 2 itself (for example, higher than a logic supply voltage Vdd), and moreover, has a possible variability with time or with the operating conditions.
The protection stage 1 in this case comprises a protection transistor 4, of a low voltage PMOS type, which is connected between the internal node 3 and an output terminal Out, and receives, on a corresponding control terminal (or gate terminal) of its own, an appropriate biasing voltage Vcp. The protection transistor 4 is connected in the so-called “cascode” configuration to the transfer transistor 2 (being, that is, cascaded and traversed by the same current that traverses the transfer transistor 2).
In use, the transfer transistor 2 is controlled via the control signal Pg in such a way as to enable (via its closing) selective transfer of the high voltage Vi(t) from the input In to the output Out. The protection transistor 4 has the function of not hindering this transfer (being brought into a state of closing or conduction, when the transfer transistor 2 is closed) and moreover of protecting the same transfer transistor 2 from overvoltages due to the presence of the high voltage Vi(t) so as to reduce breakdown or damage thereto.
FIG. 1b is a schematic illustration of a similar circuit structure, using n-channel MOS transistors, and, in particular, a transfer transistor 2, which receives a control signal Ng, and a protection transistor 4, which receives a biasing voltage Vcn, of an appropriate value, to perform the function of protection of the transfer transistor 2 (and so as not to hinder transfer of the high voltage Vi(t) from the input In to the output Out).
Generally, the protection stage is biased voltage-divider circuits, but the use of voltage dividers may not be easy to implement in the case where the high voltage Vi(t) is variable. This is, for example, the case of charge-pump circuits, in which the high voltage Vi(t) that has to be transferred from the input to the output varies from one stage of the circuit to another. The same difficulty moreover arises in the case where the high voltage Vi(t) is variable with time or with the circuit operating conditions, for example, based upon a variation of the electrical performance of a corresponding supply source. Basically, biasing circuits of a known type cannot be optimized for dynamic biasing conditions, i.e., being variable and able to adapt in time and/or as the operating conditions vary.